… This was my first RISC-V Summit. My main interests are in software ecosystem readiness and hardware/software interoperability standards, which are basically two of the biggest challenges to serious adoption of RISC-V for products. …
… Exciting on the hardware side is Device Tree additions enabling the mainline kernel to boot on the K3-powered CoM260-IFX and DeepComputing FML13V05 boards. In case you missed it recently, see Initial Benchmarks Of The SpacemiT K3 RVA23 RISC-V CPU With The K3 Pico-ITX . …
… Seamless Upgrade - Hardware compatible with Jetson Orin Nano carrier boards. Reuse existing cases and ecosystems, migrating from ARM to RISC-V smoothly. …
… Navigating the RISC-V “Paradox of Choice” RISC-V has fundamentally changed the IP landscape. …
… 15:20 – 15:55 – RISC-V Hardware Is Here. What About Software? by Afonso Oliveira RISC-V hardware momentum is everywhere: more tape-outs, more open cores, more startups, and increasingly affordable boards that everyone can try. But hardware alone doesn’t make a usable platform. …
… The Tensor core powering the Blackhole chips is called Tensix and features five RISC processors with matrix-multiply units, vector units, and local SRAM. Each RISC processor is fully programmable, and each core is attached to a high-bandwidth NOC. …
… The use of RISC-V technology is especially meaningful. RISC-V is an open instruction set architecture that allows companies and governments to develop processors without relying on proprietary licensing models from dominant foreign suppliers. …
… This last bit of the hardware architecture, which enables the software architecture to work, is the new revelation as the Maverick-2 chip comes to market today. So let’s start with the hardware and work our way up to the software. …
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