SiFive sammelt 400 Millionen Dollar ein, Nvidia wettet damit auf RISC-V im Rechenzentrum|igor´sLAB
SiFive sammelt 400 Millionen Dollar ein, Nvidia wettet damit auf RISC-V im Rechenzentrum|igor´sLAB
Search
All sources
phoronix.com
26
semiwiki.com
19
cnx-software.com
19
igorslab.de
5
tomshardware.com
5
wccftech.com
4
intel.com
3
spectrum.ieee.org
3
heise.de
2
extremetech.com
2
techpowerup.com
1
tweaktown.com
1
Tracked topic
RISC-V
Live now
RISC-V is being advanced simultaneously in operating-system support and in new high-integration, performance-focused hardware cores/MCUs.
Videos
More videosTop stories
StarFive Dubhe-100 - A 64-bit, RVA23-compliant RISC-V core for high-performance applications - CNX Software
1d agoAlibaba's TSMC-Built 5nm RISC-V Chip, XuanTie C950, Now Runs Qwen-3.8 27B Model Natively, Unlocking Massive Vertical Integration Tailwinds
2d agoWCH CH32V407/467 RISC-V MCU integrates Fast Ethernet MAC + PHY, 480 Mbps USB 2.0 PHY, up to 8 MB on-chip PSRAM - CNX Software
1w agoPoCL 7.2-RC1 Brings Official OpenCL 3.0 Conformance On RISC-V & x86_64 CPUs
1w agoESP-KVM - An open-source IP KVM solution based on ESP32-P4 RISC-V MCU - CNX Software
ESP-KVM - An open-source IP KVM solution based on ESP32-P4 RISC-V MCU - CNX Software
Fortior FU75xx dual-core motor control MCU family combines 32-bit RISC-V core with 2nd-gen Motor Engine (ME2) core - CNX Software
Motor driver IC specialist Fortior Technology has recently introduced the FU75xx dual-core motor control MCU family, pairing a 32-bit RISC-V core and the company’s proprietary 2nd-generation Motor…
OpenCV 5 release - New DNN engine with enhanced ONNX and LLM/VLM support, Intel, Arm, and RISC-V hardware optimizations - CNX Software
…The fifth version of the popular CV library also adds support for Intel, Arm, Qualcomm, and RISC-V hardware acceleration, improved 3D vision, and various new core features such as new data…
Discussions and forums
FOSDEM 2026 schedule - Embedded, RISC-V, Robotics, Rust, Open Hardware, and more - CNX Software
…14:00 – 14:35 – Upstream Embedded Linux on RISC-V SBCs: The Past, Present, and Future by Marcel Ziswiler Last year, I gave a talk about running upstream embedded Linux on RISC…
Linux 7.1 Release - Main changes, Arm, RISC-V, and MIPS architectures - CNX Software
…handle gpio-hogs only once – Fixes a behaviour change that breaks boot on Raspberry Pi 5 when using the firmware-supplied device tree RISC-V updates in Linux 7.1 RISC-V…
More SpacemiT K3 & K1 Support Landing In Upstream Linux 7.2
More SpacemiT K3 & K1 Support Landing In Upstream Linux 7.2 Written by Michael Larabel in RISC-V on 5 June 2026 at 08:16 AM EDT. Add A Comment In addition…
高通考虑以最高100亿美元收购Tenstorrent的传闻
…Tenstorrent 加速器以及 RISC-V IP。相关架构究竟会被技术性整合，还是作为独立产品线继续存在，目前完全未知。Tenstorrent 的 RISC-V 技术不仅在技术层面对高通有意义。高通在许多 Snapdragon 产品中仍然高度依赖 Arm 生态。尽管该公司开发自有 Oryon CPU 核心，但这些核心使用的是 Arm 指令集。RISC-V 提供了一种不依赖相同授权模式的更开放替代方案。高通最初可将 RISC-V 用于专用控制核心…
Tenstrorrent Posts GCC Compiler Patches For Ascalon XG Core
While the Tenstorrent Ascalon X is known as their high performance out-of-order RISC-V RVA23 CPU core for extreme performance over the H and S models, a new GNU Compiler…
COMPUTEX 2026: S2C and Andes Technology Showcase Hardcore “EDA+IP” Synergy for the AI Era - Semiwiki
…AI , Andes Technology , Prototyping , RISC-V , S2C EDA Key takeaways ▼ COMPUTEX 2026 officially concluded under the theme “AI Together,” bringing the global semiconductor and computing ecosystem together to showcase the latest advances…