Apple Taps TSMC For Fresh A18 Pro Silicon To Double MacBook Neo Production
…from the original iPhone 16 Pro smartphones, and a new run of SoCs would mean that Apple would be subject to the same memory supply constraints as the rest of the industry…
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Top stories
NVIDIA's Next-Gen Rosa CPU To Feature Rigel "Arm v9.2" Cores With Larger L2 Cache & Higher Per-Core Performance In The Same Silicon Footprint
1d agoIntel patent reveals new XBM memory architecture that ditches HBM's costly silicon interposer — backend-transistor DRAM stack uses UCIe links and built-in repair to ease AI's memory bottleneck
2d agoExynos 2700 To Shy Away From On-Package Memory, With New Design Intends To Double Down On Thermal Performance By Keeping RAM & SoC Separate
5d agoApple’s M7 To Bring New On-Device AI Performance Levels, With Its Unified Memory Bandwidth Reportedly 56% Higher Than M5, Launch Expected In H1 2027
1w agoIntel's ZAM Memory Threatens HBM's AI Throne With 2x The Bandwidth of HBM4, More Capacity & Low Thermal Constraints
…a dense 3D memory design through 3.5D packaging technology, which houses vertical and horizontal layers, including the high-bandwidth, large memory stack, Power/Ground rails, Silicon Photonics, and Legacy IO, all…
Apple unleashes M5, the next big leap in AI performance for Apple silicon
…and a nearly 30 percent increase in unified memory bandwidth to 153GB/s. 1 M5 brings its industry-leading power-efficient performance to the new 14-inch MacBook Pro , iPad Pro , and…
China pushes for 70% homegrown silicon wafer use as domestic firm ramps up 12-inch production — government seeking to localize critical chip supply chain amid AI boom and export restrictions
…National Silicon Industry Group, Zhonghuan Advanced, and Hangzhou Lion Microelectronics, with Eswin described as the most aggressive, adding roughly 700,000 wafers per month through new facilities in Xi’an and Wuhan…
Discussions and forums
Show HN: TurboQuant for mlx-lm (Apple Silicon)
Hi HN,I built mlx-turboquant, an implementation of Google's TurboQuant KV-cache compression algorithm for Apple's MLX framework.The repository includes quality benchmarks, memory benchmarks, and a modular implementation …
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Ask HN: What are some good/fast coding models for Apple Silicon?
I have an M4 Max with 128 GB of unified memory, and I thought it would be easy to reach decent inference speeds with it. After a few failed attempts to exceed about 150 t/s with completely custom Metal inference engines …
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Exclusive: China targets 70% advanced domestic silicon wafer use by 2026
According to Nikkei Asia, China is working on more than 70% of the silicon wafers used by domestic chipmakers by the end of this year. This goal demonstrates China’s most aggressive attempt to localize key semiconductor …
Show HN: Covalence – Cross-Client Memory for Claude, Cursor, and MCP (macOS)
I use Claude Desktop, Claude Code, and Cursor daily. They all have memory now, but none of them share it. Something I explained in Claude Desktop doesn't exist when I open Cursor. I got tired of re-explaining my stack, m…
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Show HN: OS Megakernel that match M5 Max Tok/w at 2x the Throughput on RTX 3090
Hey there, we fused all 24 layers of Qwen3.5-0.8B (a hybrid DeltaNet + Attention model) into a single CUDA kernel launch and made it open-source for everyone to try it.On an RTX 3090 power-limited to 220W: - 411 tok/s vs…
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Silicon Power launches CreatePro storage lineup for creators, editors, and livestreaming workflows – Fudzilla.com
…Silicon Power launches CreatePro storage lineup for creators, editors, and livestreaming workflows Silicon Power has introduced the CreatePro Series, a new range of storage products, which includes SSDs, portable SSDs, and memory…
32GB of DDR5 now costs $375 minimum — AI shortage continues to squeeze PC building
…it comes to memory prices, also teased dragging out some of its legacy products to give users more options on older memory technologies, namely Raptor Lake and DDR4. Stephen Warwick News Editor
AMD Taps GlobalFoundries for MI500's Co-Packaged Optics as the Silicon Photonics Race With NVIDIA Heats Up
…The MI500 accelerators will leverage the new CDNA 6 architecture ( CDNA 5 for MI400 series ), & HBM4E memory, which will offer even higher speeds and memory bandwidth than 19.6TB/s on HBM4…
Galaxy S27 Ultra Won’t Embrace Silicon-Carbon Battery Due To Manufacturing Costs, But That Doesn’t Mean Samsung Isn’t Evaluating A Bigger Capacity
…memory crisis, which threatens to reduce smartphone demand substantially. We’ll also advise readers to treat this information with a pinch of salt, and we’ll return with more updates. News Source…
Qualcomm Lands Meta As Major Launch Partner For Its New Dragonfly AI Chips
…Rather than leaning on conventional High Bandwidth Memory (HBM), it stacks compute and memory together in 3D silicon. The first generation ships with the AI250 accelerator and targets 133TB/s per card…
iPhone 20 Renders Reveal Apple’s Next-Generation Design, With Details Like Silicon-Anode Battery, A21 SoC, HBM RAM & More Mentioned
…such as a new battery technology, improved camera, and the A21 silicon. Surprisingly, the iPhone 20 will have a rear dual-camera at the back, hinting that the new design may also…