…Real issues encountered when porting, optimizing, and maintaining software stacks at scale on RISC-V hardware. Lessons from Production Systems: Case studies and insights from companies that have already brought RISC-V…
RISC-V Optimized strnlen Implementation For Linux 7.1 Yields Big Speed-Up Written by Michael Larabel in RISC-V on 9 April 2026 at 09:51 AM EDT. 7 Comments In…
SiFive Raises $400M To Double Down On High Performance RISC-V For Data Centers Written by Michael Larabel in RISC-V on 9 April 2026 at 10:14 AM EDT. 29 Comments…
…Some reports claim that the SoC is comprised of 12 RISC‑V primary cores and eight SiFive Intelligence X280 cores, plus another four unspecified RISC-V cores. The chip integrates cores, hardware…
Another day, another SpacemiT K3 device is released, namely Deep Computing DC-ROMA RISC-V Mainboard III for Framework Laptop 13 , following the K3 Pico-ITX SBC and K3-CoM260 (and related…
RISC-V XIP Linux Feature Being Removed After It Keeps Breaking For Months At A Time Written by Michael Larabel in RISC-V on 7 April 2026 at 06:19 AM EDT…
…While consumer devices and modular laptops are great for developers, large-scale server-side AI workloads require more powerful hardware. The CSC2-N48SPK3 addresses this with up to 48 SpacemiT K3 RISC…
…and enabling the RISC-V Ziccrse extension. The K3 also has PDMA working and fixed I/O power in the pin control (pinctrl) code. Exciting on the hardware side is Device Tree…
…MCU – WCH CH32H417MEQ6 MCU QingKe RISC-V5F up to 400 MHz QinKe RISC-V3F up to 144 MHz GPU – Graphics Processing Hardware Accelerator GPHA Memory – 896KB SRAM Storage – 960KB Flash Camera I…
…The MicroBlaze V processor is based on the RISC-V instruction set architecture (ISA). It allows developers to leverage the open-source RISC-V software ecosystem, is hardware compatible with the classic…
