AMD EPYC “Venice” Enters 2nm Production at TSMC, Extends CPU Roadmap for AI Infrastructure by Harold Fritts on May 22, 2026 AI ◇ Enterprise AMD announced that its next-generation EPYC processor, codenamed “Venice,” has entered production on TSMC’s 2nm process in Taiwan. …
… Intel also provided an update on its next data center GPU, code-named Crescent Island. Collectively, the announcements reflect Intel’s positioning around agentic AI, in which the CPU increasingly serves as the control plane for orchestration, concurrency, and data movement across clusters. …
… Two-Phase Cooling Targets Next-Gen Power Levels ZutaCore’s platform focuses on waterless two-phase direct-to-chip cooling, designed to support processors exceeding 4,000W. …
… This level of thermal headroom is increasingly relevant as next-generation AI accelerators push beyond traditional power envelopes. …
… Next-Generation DSM Targets Enterprise AI Deployments Synology previewed the next generation of DiskStation Manager DSM , which introduces capabilities designed for AI-enabled infrastructure and large-scale enterprise deployments. …
… These overheads scale with concurrency rather than model size, and at the request rates that agentic workloads generate, the host can become the bottleneck. More host CPU per accelerator is the straightforward fix. …