S2C, MachineWare, and Andes Introduce RISC-V Co-Emulation Solution to Accelerate Chip Development - Semiwiki
… The solution integrates MachineWare’s SIM-V virtual platform, S2C’s Genesis Architect and Prodigy FPGA Prototyping Systems, and Andes’ high-performance AX46MPV RISC-V CPU core, providing a unified environment for hardware and software co-verification. …