The Road to Innovation with Synopsys 224G PHY IP From Silicon to Scale: Synopsys 224G PHY Enables Next Gen Scaling Networks by Mike Gianfagna on 05-19-2025 at 6:00 am View Forum Posts View Articles Private Message Categories: Events , IP , Synopsys The explosive growth of large language models LLMs… …
… Our APU is a processor designed specifically around those patterns, executing Spark SQL natively in silicon. …
… Recent academic research discussed alongside DAC emphasizes autonomous or “agentic” chip design, where AI systems can iteratively refine architectures and physical implementations with minimal human intervention. Another major focus area is chiplet-based design and heterogeneous integration. …
… GPUs such as NVIDIA’s H100 are at the reticle limits, meaning the design consumes the largest fabricable die size, even in an advanced process, making adding more functionality on one chip difficult. …
… Panel Discussion: The Productivity Promise – AI Apps from RL to LLMs to Agents This panel moderated by industry journalist Junko Yoshida and featuring experts from Nvidia, Microsoft, AMD, Intel, and Synopsys explored the broader implications of AI beyond chip design. …
… Elon Musk needs to know that it takes longer for companies to design complex AI chips on leading edge processes than it takes TSMC and Intel to build the fabs that will manufacture them. …